Modern consumer electronics, such as cellular phones, digital cameras, and music players, are packing more integrated circuits into an ever shrinking physical space with expectations for decreasing cost. Numerous technologies have been developed to meet these requirements. Some of the research and development strategies focus on new technologies while others focus on improving the existing and mature technologies. Research and development in the existing technologies may take a myriad of different directions.
Consumer electronics requirements demand more integrated circuits in an integrated circuit package while paradoxically providing less physical space in the system for the increased integrated circuits content. Continuous cost reduction is another requirement. Some technologies primarily focus on integrating more functions into each integrated circuit. Other technologies focus on stacking these integrated circuits into a single package. While these approaches provide more functions within an integrated circuit, they do not fully address the requirements for lower height, smaller space, and cost reduction.
One proven way to reduce cost is to use mature package technologies with existing manufacturing methods and equipments. Paradoxically, the reuse of existing manufacturing processes does not typically result in the reduction of package dimensions. Still the demand continues for lower cost, smaller size and more functionality. Continued integration of functions into a single integrated circuit increases the integrated circuit size necessitating a more expensive package, a higher profile package, or a higher pin count package, or a combination thereof.
A variation of existing technologies uses mature package technologies with lead fingers made from lead frames. However, lead frame packages typically use bond wires electrically connecting the lead fingers to the integrated circuit resulting in less than optimal package height or pin count or both. Another variation of existing technologies uses solder bumps on the integrated circuit with a flip chip mounting. However, the flip chip mounting requires reflow of the solder bumps often resulting in uneven solder flow, inconsistent connection to the package terminals, contamination from inadvertent flow, or a combination thereof. Yet another variation combines flip chip style mounting with lead frame packages. However, numerous manufacturing steps are required to create suitable solder reflow, or wettable, areas in the lead fingers resulting in increased complexity, reduced manufacturing yield, and increased cost.
Thus, a need still remains for a flip chip lead frame integrated circuit package system providing low cost, low profile, and high yield as well as providing robust electrical performance. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.